Hokkaido University Research Profiles

Japanese

low power consumption: 2

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  • Life Sciences
  • Information and Communication
  • Nanotechnology / Materials
  • Manufacturing Technology
  • Human and Social Sciences
  • Energy
  • Environment
  • Tourism / Community development
  • Arctic Research
  • Social Infrastructure
  • Open Facilities
  • Low Power Consumption Tunnel Transistors

    Realizing next-generation energy-saving devices with new semiconductor interfaces

    With this research we proposed and realized an unprecedented low-power FET/tunnel FET by applying a new semiconductor solid-phase interface, which is formed by very small nanowires a few thousandths of a hair’s width, to a switch element.

    Research

    High performance of microprocessors and semiconductor integrated circuits, which are the brains of smartphones and PCs, have been achieved by reducing the size of field-effect transistors (FETs), which are the basic elements, and installing approximately 2 to 3 billion of them. While higher performance is being achieved, the rapid increase in power consumption of these FETs is becoming a serious problem. This is because there is a physical limit (60 mV/digit) on the switching performance (sub-threshold factor) of FETs. To realize drastic energy saving in the future, it is necessary to develop a new switch element that can break through the physical limit on FETs and their practical application. With this research, we have proposed and realized an unprecedented low-power-consumption tunnel FET.

  • Low-power A/D Converters for Sensing

    Use of time to digital converter for A/D converter and its low power consumption

    Single-Slope A/D converters, which involve the simplest configuration, are used in various forms (image sensors, etc.). However, one drawback is their slow conversion speed. With this technique high speed and low power consumption can be achieved simultaneously.

    Research

    Single-Slope A/D converters convert analog values to time and then digitize them. By using the Time to Digital Converter (TDC), the conversion time can be greatly reduced. However, power consumption increases significantly. Intermittent operation of the TDC is effective to reduce the power consumption of the TDC part by a factor of several times ten, enabling both high speed and low power consumption. The features of this method are as follows:
    Realization of low-power, high-speed, small-area A/D converters
    ・Synchronization and consistency of two measurements with high precision and coarse accuracy are guaranteed in principle
    ・The A/D conversion characteristics are continuous and easy to correct.